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cml microcircuits communication semiconductors cmx878 line powered modem plus daa ? 2002 consumer microcircuits limited d/878/2 december 2002 provisional issue features applications v.22bis, v.22, bell 212a, v.23/bell 202, v.21/bell 103 modulation schemes line powered applications epos terminals dtmf/tones transmit and receive remote utility meter reading line reversal and ring detection security systems regulated power taken from line telephone telemetry systems gyrator and im pedance matching control atms parallel phone detection pay - phones low power operation and standby e - mail terminals microcontroller vdd line interfacing tip cmx878 application circuitry ring cbus extracted power 1.1 brief description the cmx878 is a line - powered multi - standard modem for use in telephone based information and telemetry systems. it provides the building blocks for interfacing to the telephone line wit hout the need for a transformer - this is the data access arrangement (daa) ? allowing for the coupling of data signals to and from the line; it can also detect ringing and line reversals. provision is made for the conditioning and monitoring of other as pects of the telephone line ? this includes the gyrator/loop current, line impedance control, and line voltage measurement. a complete line interface can be implemented using low cost external components. very low power consumption and built - in power man agement makes the cmx878 suitable for telephone line power usage. furthermore the microcontroller can be de - powered whilst awaiting the detection of a ring, line reversal, or wake pin event. control of the device is via a simple high speed serial bus, co mpatible with most types of c serial interface. data transmitted and received by the modem is transferred over the same serial bus. the cmx878 is available in 28 - pin soic, ssop and tssop packages.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 2 d/878/2 contents section page 1.1 brief description ................................ ................................ .................. 1 1.2 block diagrams ................................ ................................ ................... 4 1.3 signal list ................................ ................................ ............................ 6 1.4 external components ................................ ................................ .......... 8 1.4.1 ring detector interface ................................ ......................... 10 1.4.2 line - derived power & line interface ................................ .... 11 1.4.2.1 standby regulator ................................ ................................ . 11 1.4.2.2 the regulated supply & line volts measurement .............. 11 1.4.2.3 loop current control, a c impedance & modulation ........... 12 1.4.2.4 rx hybrid ................................ ................................ ................ 12 1.4.2.5 transmit levels & receive thresholds ................................ 12 1.5 general description ................................ ................................ ........... 16 1.5.1 tx usart ................................ ................................ .............. 17 1.5.2 fsk and qam/dpsk modulators ................................ ......... 18 1.5.3 tx filter and equaliser ................................ .......................... 19 1.5.4 dtmf/tone generator ................................ .......................... 19 1.5.5 tx level control and output buffe r ................................ ..... 19 1.5.6 rx dtmf/tones detectors ................................ .................... 20 1.5.7 rx modem filterering and demodulation ............................ 21 1.5.8 rx modem pattern detectors and descrambler .................. 22 1.5 .9 rx data register and usart ................................ ............... 22 1.5.10 dac 24 1.5.11 adc 24 1.5.12 c - bus interface ................................ ................................ ..... 26 1.5.12.1 general reset command .............................. 29 1.5.12.2 configuration register ................................ . 29 1.5.12.3 supplementary standby register ................ 30 1.5.12.4 line/wakeup event register ........................ 30 1.5.12.5 line control register ................................ .... 31 1.5.12.6 line control register ................................ .... 31 1.5.12.7 adc control register ................................ ... 32 1.5.12.8 general control register .............................. 33 1.5.12.9 transmit mode register ............................... 35 1.5.12.10 receive mode register ................................ . 38 1.5.12.11 tx data register ................................ ............ 40 1.5.12.12 rx data register ................................ ........... 40 1.5.12.13 status register ................................ .............. 41 1.5.12.14 programming register ................................ .. 44 1.6 application notes ................................ ................................ .............. 48 1.6.1 programming register ................................ ............. 48 1.6.2 microprocessor boot - up routines .......................... 49 1.6.4 v.22 bis calling modem application ................................ .... 49 1.6.5 v.22 bis answering modem application .............................. 50
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 3 d/878/2 1.7 performance specification ................................ ................................ 52 1.7.1 electrical performance ................................ .......................... 52 1.7.1.1 absolute maximum ratings ................................ ..... 52 1.7.1.2 operating limits ................................ ....................... 52 1.7.1.3 operating characteristics ................................ ........ 53 1.7.2 packaging ................................ ................................ .............. 60
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 4 d/878/2 1.2 block diagrams figure 1a block diagram of cmx878 within a typical application (see figure 1b for details of modem & tones processor block)
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 5 d/878/2 local analogue loopback tx output buffer tx level control rx input amplifier rx gain control m od rxfb bias + - rxin scrambler enable descrambler enable modem energy detector figure 1b bl ock diagram of modem & tones processor figure 1c block diagram of the adc circuit
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 6 d/878/2 1.3 signal list cmx878 d1/d6/e1 packages signal description pin no. name type 1 xtaln o/p the output of the on - chip xt al oscillator inverter. 2 xtal/clock i/p the input to the oscillator inverter from the xtal circuit or external clock source. 3 dv ss power the negative supply rail for the digital on - chip blocks. 4 wake i/p a 0 to 1 transition on this pin can be used to wake the device. 5 rd i/p schmitt trigger input to the ring signal detector. connect to v ss if ring detector not used. 6 rt bi open drain output and schmitt trigger input forming part of the ring signal detector. connect to sbyv dd if ring detector not u sed. 7 sbyv dd power the positive rail of the low current standby supply. this supply will normally remain present even when the regulated supply has been de - powered. 8 vfb o/p forms part of the regulator feedback loop. 9 regenab o/p a logic output used to enable the regulator. this pin is powered from the standby supply and will take the level of sbyv dd when high. 10 av dd power the positive rail of the regulated power supply. 11 mod o/p the modulation signals generated by the device are output at thi s pin. 12 rxin i/p the inverting input to the rx input amplifier. 13 rxfb o/p the output of the rx input amplifier. 14 avss power the negative supply rail for the analogue on - chip blocks. 15 v bias i/p internally generated bias voltage of approximately av dd /2. it will discharge to v ss when in powersave mode or when the regulated supply is de - powered. 16 adcin i/p the input to the analogue to digital converter. used in line voltage measurement and detection of extensions going off - hook. 17 ictrl o/p t he output of the programmable dac. used for programming a current drawn from the line. 18 gyon o/p a logic output used to enable the gyrator. 19 clid z en o/p a logic output. could be used in circuits with caller line id provision to switch in a line m atching impedance.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 7 d/878/2 cmx878 d1/d6/e1 packages signal description pin no. name type 20 gp op1 o/p a general purpose logic output. an example use would be as an enable for a second regulator in circuits with a battery. 21 gp op2 o/p a general purpose lo gic output. an example use would be as a line voltage measurement divider enable in circuits where this function is required separately from the regulator. 22 gp op3 o/p a general purpose logic output. an example use would be as a control to inhibit the ring signal in systems where the application is in series with a phone. 23 csn i/p the c - bus chip select input from the m c. 24 cmd data i/p the c - bus serial data input from the m c. 25 serial clock i/p the c - bus serial clock input from the m c. 26 repl y data t/s a 3 - state c - bus serial data output to the m c. this output is high impedance when not sending data to the m c. 27 irqn o/p a ?wire - orable? output for connection to a m c interrupt request input. this output is pulled down to v ss when active and i s high impedance when inactive. an external pullup resistor is required ie r1 of figure 2 28 dv dd power the positive supply rail for the digital on - chip blocks. notes: i/p = input o/p = output bi = bidirectional t/s = 3 - state output nc = no connection
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 8 d/878/2 1.4 external components r1 100k w c1, c2 22pf x1 11.0592mhz c3 100nf or 12.288mhz resistors 5%, capacitors 20% unless otherwise stated. figure 2a pin - out of packaged device
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 9 d/878/2 power supply arrangement figure 2b recommended power supply connections and de - coupling this device is capable of detecting and decoding small amplitude signals. to achieve this dv dd, av dd and v bias should be decoupled and the receive path protected from extraneous in - band signals. it is recommended that the printed circuit board is laid out with both av ss and dv ss ground planes in the cmx878 area, as shown in figure 2b, with provision to make a lin k between them close to the cmx878. to provide a low impedance connection to ground, the decoupling capacitors must be mounted as close to the cmx878 as possible and connected directly to their respective ground plane. this will be achieved more easily b y using surface mounted capacitors. v bias is used as an internal reference for detecting and generating the various analogue signals. it must be carefully decoupled, to ensure its integrity. apart from the decoupling capacitor, no other loads are allowe d. if v bias needs to be used to set external analogue levels, it must be buffered with a high input impedance buffer. the dv ss connections to the xtal oscillator capacitors c1 and c2 should also be of low impedance and preferably be part of the dv ss grou nd plane to ensure reliable start up of the oscillator. in a line powered application it is important to prevent noise from the circuit being coupled onto the line; careful board layout should be employed to minimise this. it is also important to minimi se power supply noise currents from causing undesirable modulation of the line; the circuit configuration shown in figure 4a will minimise this effect.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 10 d/878/2 1.4.1 ring detector interface this interface runs f rom the standby supply. figure 3 shows how the cmx878 may be used to detect the large amplitude ringing signal voltage or a line reversal present at the start of an incoming telephone call. the ring signal is usually applied at the subscriber's exchange as an ac voltage inserted in series with one of the telephone wires and will pass through either c19 and r26 or c20 and r27 to appear at the top end of r28 (point x in figure 3) in a rectified and attenuated form. the signal at point x is further atten uated by the potential divider formed by r28 and r29 before being applied to the cmx878 rd input. if the amplitude of the signal appearing at rd is greater than the input threshold (vthi) of schmitt trigger 'a' then the n transistor connected to rt will be turned on, pulling the voltage at rt to v ss by discharging the external capacitor c21. the output of the schmitt trigger 'b' will then go high; this output is then processed by logic circuits running from the standby supply. the minimum amplitude ringin g signal that is certain to be detected is: ( 0.7 + vthi x [r26 + r28 + r29] / r29 ) x 0.707 vrms where vthi is the high - going threshold voltage of the schmitt trigger a (see section 1.7.1). with r26 - 28 all 470k w as figure 3, th en setting r29 to 68k w will ensure detection of ringing signals of 30vrms and above for sbyv dd over the range 2.9v to 3.9v. from line rd cmx878 to standby logic circuits rt sbyv dd av ss av ss d9 - 12 c19 c22 (opt.) r26 r27 r28 r30 c20 rt output of inverting schmitt trigger ?b? bridge rectifier o/p (x) ring signal vthi av ss av ss vthi a b x r26, 27, 28 470k w c19, 20 0.1 m f r29 see text c21 150nf r30 1m w d9 - 12 1n4004 resistors 5%, capacitors 20% figure 3 ring signal detector interface circuit
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 11 d/878/2 if the time constant of r30 and c21 is large enough then the voltage on rt will remain below the threshold of the 'b' schmitt trigger for the duration of a ring cycle. the time for the voltage on rt to charge from v ss towards sbyv dd can be derived from the formula v rt = sbyv dd x [1 - exp( - t/(r30 x c21)) ] as the schmitt trigger high - going input threshold v oltage (vthi) has a minimum value of 0.56 x sbyv dd , then the schmitt trigger b output will remain high for a time of at least 0.821 x r30 x c21 following a pulse at rd. the values of r30 and c21 given in figure 3 (1m w and 150nf) give a minimum rt charge t ime of 100 msec, which is adequate for ring frequencies of 10hz or above. the circuit will also respond to a telephone line voltage reversal. the bt specification sin242 gives a range of reversal voltages and slew times which must be detected. the slow est change required to be detected is a +15v to ? 15v reversal between the two lines slewing in 30ms. in order to ensure detection of this reversal the resistor r29 should be set to 300k w . there are systems where the ?ring? signal is made up from consecut ive fast line reversals ? an example is an isdn terminal adapter which connects to local pots ports. in such a case the cmx878 ring detector circuit will give a better response with the inclusion of capacitor c22 (10nf). if the ring detect function is no t used then pin rd should be connected to v ss and rt to sbyv dd . 1.4.2 line - derived power and line interfacing the cmx878 has the building blocks for providing a variety of line interfacing s olutions. figure 4a shows a suitable set of external components for interfacing to the line (explained in figure 4b) . note that some of the component values vary according to whether the application is for american or european markets. 1.4.2.1 standb y regulator the ring detect and wake input circuitry and the standby c - bus registers are permanently powered by the voltage on the sbyv dd pin. this voltage is generated from the telephone line voltage by th e standby regulator, which consists of the high value resistor r3 and an on - chip zener diode (nominally 3.3v) connected between the sbyv dd and v ss pins. d5 and c8 ensure that sbyv dd remains at a workable value during short line breaks. d6 provides an alte rnative source of sbyv dd when the main regulated supply is present. 1.4.2.2 the regulated supply and line volts measurement when the regenab pin is high m1 and q1 connect the +v e line voltage to the line voltage measurement divider r6, r7 and, via r8 and r9, to the av dd regulator circuit q2, q3. an on - chip comparator and bandgap reference control the base drive to q2 via the vfb pin to keep the regulated supply av dd at nominally 3.3v. the digital parts of the cmx878 are powered from the dv dd pin. this supply is derived from the regulated supply av dd through a decoupling network r2, c6, c7. the regulated supply powers all parts of the cmx878 (except the standby circuits) and al so the host microcontroller. it is recommended that the total load on this supply should not exceed 10ma. the standby supply will out - live the regulated supply following a loss of line voltage.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 12 d/878/2 1.4.2.3 loop current control, ac impedance and modulation when the cmx878 is in standby mode, the gyon and ictrl output pins will be at vss, hence q4, q5 and m2 will be turned off and will draw no current from the telephone line. in t he off - hook mode, the regulated supply will be turned on, the gyon output will be at v dd and the ictrl output will be high impedance, hence m2 will be turned on, providing drive to the quasi - darlington q4/q5. the dc loop current taken from the line is then controlled by the network r16, d8, r19, r20, r14 and r15. transistor q6, together with the voltage divider r17, r18 and decoupling capacitor c11, act as an optional dc current limiter which limits to approx. 60ma with the recommended components (as requir ed in tbr21). with selection of the appropriate external component values the resulting dc line voltage vs. current characteristic can be made to meet the requirements of tbr21 or eia - 470 - a. the ac impedance presented to the line in the off - hook mode is controlled by the network c10, r15, r14. with selection of the component values for the appropriate market it will either give a good match to the tbr21 (european) nominal impedance as shown below? ?or 600 w for american systems. the analogue signa l output of the cmx878 modem appears at the mod pin and modulates the line voltage via c13, r22, r21, q5 and q4. c14 attenuates any high frequency noise that may be present at the mod output pin. when the regulated supply is enabled, the cmx878 may also be set into a ?line probing? mode, in which it draws a programmable current from the telephone line. this can be useful in characterising the line. in this mode the gyon output is at v ss and the line current is determined by the output of the dac appearin g at the ictrl output pin. note that in this mode the ac impedance presented to the line and the transmit signal levels will not be correct. 1.4.2.4 rx hybrid the ac signal input to the cmx878 is taken from the li ne through c16 and r25 to the input amplifier pin rxin, the level of the receive signal appearing at the rxfb pin being determined by the ratio of the resistors r25 and r24. c15 and r23 provide a receive hybrid function to reduce the level of transmitted s ignal appearing at the rxfb pin (the cmx878 requires a minimum of 7db rejection, however with careful component selection it will be possible to greatly exceed this). 1.4.2.5 transmit levels and receive thresholds transmit levels and receive thresholds are proportional to av dd. 0dbm = 775mvrms. with the circuit in figure 4a (which regulates av dd to 3.3v), the tx mode register set for a tx level control gain of 0db and a matched line, the nominal transmit line levels will be: qam, dpsk and fsk tx modes (no guard tone) - 10dbm single tone transmit mode - 10dbm dtmf transmit mode - 6 and - 8 dbm with the rx mode register set for a rx level control gain of 0db, the nominal receiver thr esholds will be as stated in the operating characteristics.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 13 d/878/2 figure 4a line interfacing components (ring detection components shown separately)
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 14 d/878/2 figure 4b explanatory view of line interfacing circuit shown in figure 4a
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 15 d/878/2 component values ? for figur es 2a, 2b and 4a resistors 5%, capacitors 20% r1 100k w c1, c2 22pf r2 30 w c3 100nf r3 6.8m w c4 22 m f r4 100k w c5 100nf r5 220k w c6 22 m f r6 470k w c7 100nf r7 15k w c8 100nf r8 100k w c9 100nf r 9 100k w c10 euro: 3.3 m f us: not required r10 100k w c11 euro: 33 m f us: not required r11 2.7k w c12 3.3 m f c13 220nf r13 10k w c14 10nf r14 euro: 12 w (0.25w) us: 27 w (0.5w) c15 100nf r15 euro: 36 w (0.6w) us: wire link c16 47nf r16 10k w c 17 100pf r17 euro: 5.6k w us: not required c18 3.3 m f r18 euro: 2k w us: not required c23 220nf r19 470 w r20 10k w d1 - d4 d1n4004 r21 euro: 3.3k w us: 3k w d5 1n914 r22 euro: 2.7k w us: 3k w d6 1n914 r23 euro: 100k w us: 91k w d7 bzx84c5v6 r24 100k w d8 bzx84c4v7 r25 160k w q1 mmbta92 q2 mmbta42 m1, m2 bsn304 or zvnl535a q3 mmbta92 q4* fzt757 q5 mmbta42 q6 euro: bc846 us: not required x1 11.0592mhz or 12.288mhz *transistor q4 is t he main off - hook load and will dissipate heat. in circuits with the built - in current limiting, the power dissipation can be up to 2 watts; without current limiting the power dissipation can be up to 1 watt. ensure adequate heat sink provision. ?euro? r epresents component values for european markets (specification tbr21). ?us? represents component values for north american markets (specification eia - 470)
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 16 d/878/2 1.5 general description the cmx878 transmit and receiv e operating modes are independently programmable. the transmit mode can be set to any one of the following: v.22bis modem. 2400bps qam (quadrature amplitude modulation). v.22 and bell 212a modem. 1200 or 600 bps dpsk (differential phase shift keying). v.21 modem. 300bps fsk (frequency shift keying). bell 103 modem. 300bps fsk. v.23 modem. 1200 or 75 bps fsk. bell 202 modem. 1200 or 150 bps fsk. dtmf transmit. single tone transmit (from a range of modem calling, answer and other tone frequencies) user programmed tone or tone pair transmit (programmable frequencies and levels) disabled. the receive mode can be set to any one of the following: v.22bis modem. 2400bps qam. v.22 and bell 212a modem. 1200 or 600 bps dpsk. v.21 modem. 300bps fsk. be ll 103 modem. 300 bps fsk. v.23 modem. 1200 or 75 bps fsk. bell 202 modem. 1200 or 150 bps fsk. dtmf detect. 2100hz and 2225hz answer tone detect. call progress signal detect. user programmed tone or tone pair detect. disabled. the cmx878 may also be set into a powersave mode which disables all circuitry except for the c - bus interface and the ring detector.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 17 d/878/2 1.5.1 tx usart a flexible tx usart is provided for all modem modes, meeting the requirements of v.14 for qam and dpsk modems. it can be programmed to transmit continuous patterns, start - stop characters or synchronous data. in both synchronous data and start - stop modes the data to be transmitted is written by the c into the 8 - bit c - bus tx data register fro m which it is transferred to the tx data buffer. if synchronous data mode has been selected the 8 data bits in the tx data buffer are transmitted serially, b0 being sent first. in start - stop mode a single start bit is transmitted, followed by 5, 6, 7 or 8 data bits from the tx data buffer - b0 first - followed by an optional parity bit then - normally - one or two stop bits. the start, parity and stop bits are generated by the usart as determined by the tx mode register settings and are not taken from the tx data register. figure 5a tx usart every time the contents of the c - bus tx data register are transferred to the tx data buffer the tx data ready flag bit of the status register is set to 1 to indicate that a new value should be loaded into the c - bus tx data register. this flag bit is cleared to 0 when a new value is loaded into the tx data register. figure 5b tx usart function (start - stop mode, 8 data bits + parity) if a new value is not loaded into the tx data register in time for the next tx data register to tx data buffer transfer then the status register tx data underflow bit will be set to 1. in this event the contents of the tx data buffer will be re - transmitted if synchronous data mode has been selected, or if the tx modem is in start - stop mode then a continuous stop signal (1) will be transmitted until a new value is loaded into the tx data register.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 18 d/878/2 in all modes the transmitted bit and baud rates are the nominal rates for the selected modem type, with an accuracy determined by the x tal frequency accuracy, however for qam and dpsk modes v.14 requires that start - stop characters can be transmitted at up to 1% overspeed (basic signalling rate range) or 2.3% overspeed (extended signalling rate range) by deleting a stop bit from no more th an one out of every 8 (basic range) or 4 (extended range) consecutive transmitted characters. to accommodate the v.14 requirement the tx data register has been given two c - bus addresses, $e3 and $e4. data should normally be written to $e3. in qam or dps k start - stop modes if data is written to $e4 then the programmed number of stop bits will be reduced by one for that character. in this way the c can delete transmitted stop bits as needed. in fsk start - stop modes, data written to $e4 will be transmitte d with a 12.5% reduction in the length of the stop bit at the end of that character. in all synchronous data modes data written to $e4 will be treated as though it had been written to $e3. the underspeed transmission requirement of v.14 is automatically met by the cmx878 as in start - stop mode it automatically inserts extra stop bit(s) if it has to wait for new data to be loaded into the c - bus tx data register. the optional v.22/v.22bis compatible data scrambler can be programmed to invert the next input bit in the event of 64 consecutive ones appearing at its input. it uses the generating polynomial: 1 + x - 14 + x - 17 1.5.2 fsk and qam/dpsk modulators serial data from the usart is fed via the optional scrambler to the fsk modulator if v.21, v.23, bell 103 or bell 202 mode has been selected or to the qam/dpsk modulator for v.22, v.22bis and bell 212a modes. the fsk modulator generates one of two frequencies according to the transmit mode and th e value of current transmit data bit. the qam/dpsk modulator generates a carrier of 1200hz (low band, calling modem) or 2400hz (high band, answering modem) which is modulated at 600 symbols/sec as described below: 600bps v.22 signals are transmitted as a +90 carrier phase change for a ?0? bit, +270 for ?1?. for v.22 and bell 212a 1200bps dpsk the transmit data stream is divided into groups of two consecutive bits (dibits) which are encoded as a carrier phase change: dibit (left - hand bit is the first of the pair) phase change 00 +90 01 0 11 +270 10 +180
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 19 d/878/2 for v.22bis 2400bps qam the transmit data stream is divided into groups of 4 consecutive data bits. the first two bits of each group are encoded as a phase quadrant change and the last two bits define one of four elements within a quadrant: first two bits of group (left - hand bit is the first of the pair) phase quadrant change 00 +90 (e.g. quadrant 1 to 2) 01 0 (no change of quadrant) 11 +270 (e.g. quadrant 1 to 4) 10 +180 (e.g. quadrant 1 to 3) figure 6 v.22bis signal constellation 1.5.3 tx filter and equaliser the fsk or qam/dpsk modulator output signal is fed through the transmit filter and equaliser block which limits the out - of - band signal energy to acceptable limits. in 600, 1200 and 2400 bps fsk, dpsk and qam modes this block includes a fixed compromise line equaliser which is automatically set for the particular modulation type and frequency band being employed. this fixed compromise line equaliser may be enabled or disabled by bit 10 of the general control register. the amount of tx equalisation provided compensates for one quarter of the relative amplitude and delay distortion of ets test line 1 over the frequency band used. 1.5.4 dtmf/tone generator in dtmf/tones mode this block generates dtmf signals or single or dual frequency tones. in qam/dpsk modem modes it is used to generate the optional 550 or 1800hz guard tone. 1.5.5 tx level control and output buffer the outputs (if present) of the transmit filter and dtmf/tone generator are summed then passed through the programmable tx level control and tx output buffer to the pins mod pin.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 20 d/878/2 1.5.6 rx dtmf/tones detectors in rx tones detect mode the received signal, after passing through the rx gain control block, is fed to the dtmf / tone s / call progress / answer tone detector. the user may select any of four separate detectors: the dtmf detector detects standard dtmf signals. a valid dtmf signal will set bit 5 of the status register to 1 for as long as the signal is detected. the prog rammable tone pair detector includes two separate tone detectors (see figure 12). the first detector will set bit 6 of the status register for as long as a valid signal is detected, the second detector sets bit 7, and bit 10 of the status register will be set when both tones are detected. the call progress detector measures the amplitude of the signal at the output of a 275 - 665 hz bandpass filter and sets bit 10 of the status register to 1 when the signal level exceeds the measurement threshold. -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db fig ure 7a response of call progress filter the answer tone detector measures both amplitude and frequency of the received signal and sets bit 6 or bit 7 of the status register when a valid 2225hz or 2100hz signal is received.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 21 d/878/2 1.5.7 rx modem filterering and demodulation when the receive part of the cmx878 is operating as a modem, the received signal is fed to a bandpass filter to attenuate unwanted signals and to provide fixed compromise line equalisation for 600, 1200 and 2400 bps fsk, dpsk and qam modes. the characteristics of the bandpass filter and equaliser are determined by the chosen receive modem type and frequency band. the line equaliser may be enabled or disabled by bit 10 of th e general control register and compensates for one quarter of the relative amplitude and delay distortion of ets test line 1. the responses of these filters, including the line equaliser and the effect of external components used in figures 4a are shown i n figures 7b - e: -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db figure 7b qam/dpsk rx filters figure 7c v.21 rx filters -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db -60 -50 -40 -30 -20 -10 0 10 0 0.5 1 1.5 2 2.5 3 3.5 4 khz db figure 7d bell 103 rx filters figure 7e v.23/bell 202 rx filters the signal level at the output of the receive modem filter and equaliser is measured in the mode m energy detector block, compared to a threshold value, and the result controls bit 10 of the status register. the output of the receive modem filter and equaliser is also fed to the fsk or qam/dpsk demodulator depending on the selected modem type.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 22 d/878/2 the fsk demodulator recognises individual frequencies as representing received ?1? or ?0? data bits: the qam/dpsk demodulator decodes qam or dpsk modulation of a 1200hz or 2400hz carrier and is used for v.22, v.22bis and bell 212a modes. it includes an adapt ive receive signal equaliser (auto - equaliser) that will automatically compensate for a wide range of line conditions in both qam and dpsk modes. it must be enabled when receiving 2400bps qam. the auto - equaliser can provide a useful improvement in performa nce in 600 or 1200bps dpsk modes as well as 2400bps qam, so although it must be disabled at the start of a handshake sequence, it can be enabled as soon as scrambled 1200bps 1s have been detected. both fsk and qam/dpsk demodulators produce a serial data b it stream which is fed to the rx pattern detector, descrambler and usart block, see figure 8a. in qam/dpsk modes the demodulator input is also monitored for the v.22bis handshake ?s1? signal. the qam/dpsk demodulator also estimates the received bit error rate by comparing the actual received signal against an ideal waveform. this estimate is placed in bits 2 - 0 of the status register, see figure 11. 1.5.8 rx modem pattern detectors and descrambler see figure 8a. the 1010.. pattern detector operates only in fsk modes and will set bit 9 of the status register when 32 bits of alternating 1s and 0s have been received. the ?continuous unscrambled 1s? detector operates in all modem modes and sets bits 8 and 7 of the status register to ?01? when 32 consecutive 1s have been received. the descrambler operates only in dpsk/qam modes and is enabled by setting bit 7 of the rx mode register. the ?continuous scrambled 1?s? detector operates o nly in dpsk/qam modes when the descrambler is enabled and sets bits 8 and 7 of the status register to ?11? when 32 consecutive 1s appear at the output of the descrambler. to avoid possible ambiguity, the ?scrambled 1s? detector is disabled when continuous unscrambled 1s are detected. the ?continuous 0s? detector sets bits 8 and 7 of the status register to ?10? when nx consecutive 0s have been received, nx being 32 except when dpsk/qam start - stop mode has been selected, in which case nx = 2n + 4 where n is the number of bits per character including the start, stop and any parity bits. all of these pattern detectors will hold the ?detect? output for 12 bit times after the end of the detected pattern unless the received bit rate or operating mode is changed, in which case the detectors are reset within 2 msec. 1.5.9 rx data register and usart a flexible rx usart is provided for all modem modes, meeting the requirements of v.14 for qam and dpsk modems. it can be programmed to treat the received data bit stream as synchronous data or as start - stop characters. in synchronous mode the received data bits are all fed into the rx data buffer which is copied into the c - bus rx data register after every 8 b its.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 23 d/878/2 in start - stop mode the usart control logic looks for the start of each character, then feeds only the required number of data bits (not parity) into the rx data buffer. the parity bit (if used) and the presence of a stop bit are then checked and th e data bits in the rx data buffer copied to the c - bus rx data register. figure 8a rx modem data paths whenever a new character is copied into the c - bus rx data register, the rx data ready flag bit of the status register is set to ?1? to prompt the c to read the new data and, in start - stop mode, the even rx parity flag bit of the status register is updated. in start - stop mode, if the stop bit is missing (received as a ?0? instead of a ?1?) the received character will still be placed into the rx dat a register and the rx data ready flag bit set, but, unless allowed by the v.14 overspeed option described below, the status register rx framing error bit will also be set to ?1? and the usart will re - synchronise onto the next ?1? ? ?0? (stop ? start) trans ition. the rx framing error bit will remain set until the next character has been received. figure 8b rx usart function (start - stop mode, 8 data bits + parity) if the c has not read the previous data from the rx data register by the time that new d ata is copied to it from the rx data buffer then the rx data overflow flag bit of the status register will be set to 1. the rx data ready flag and rx data overflow bits are cleared to 0 when the rx data register is read by the c. for qam and dpsk start - stop modes, v.14 requires that the receive usart be able to cope with missing stop bits; up to 1 missing stop bit in every 8 consecutive received characters being allowed for the +1% overspeed (basic signalling rate) v.14 mode and 1 in 4 for the +2.3% over speed (extended signalling rate) mode.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 24 d/878/2 to accommodate the requirements of v.14, the cmx878 rx mode register can be set for 0, +1% or +2.3% overspeed operation in qam or dpsk start - stop modes. missing stop bits beyond those allowed by the selected overspee d option will set the rx framing error flag bit of the status register. in order that received break signals can be handled correctly in v.14 rx overspeed mode, a received character which has all bits ?0?, including the stop and any parity bits, will alwa ys cause the rx framing error bit to be set and the usart to re - synchronise onto the next ?1? ? ?0? transition. additionally the received continuous 0s detector will respond when more than 2m + 3 consecutive ?0?s are received, where ?m? is the selected to tal number of bits per character including stop and any parity bits. 1.5.10 dac this is an 8 - bit linear digital to analogue converter. the primary intended purpose is that it will be used for controlling a current drawn from the line as part of a line characterisation function; it could, however, be used for any other purpose if so required. it is powered from the regulated supply. the output level is set by programming the c - bus dac control register ? see the regist er description for more information. note that when the dac is enabled, the output impedance is set to a nominal 5k w . when used in conjunction with the circuit in figure 4a and with the gyrator disabled, the programmed dac voltage will give a current out of the ictrl pin of approximately (dac voltage ? 0.7v) / 5k w . the current drawn from the line will be approximately 200 times this current. 1.5.11 adc the analogue to digital converter has two major components: a dedic ated 8 - bit dac and a comparator. see figure 1c. the comparator compares the output of the dac (adc - ref voltage) with the input signal adcin. the output of the comparator is fed to the c - bus. see also the register description for more information. ther e are two main ways of using this adc: i. line drop - out detection, e.g. testing for an extension going off - hook determine the line voltage at below which the microcontroller needs to be alerted and calculate the corresponding divided - down voltage at adci n. program adc - ref to this voltage. read the line/wakeup event register to clear any false drop - out detection which may occur at the moment when the adc circuit is programmed. set mask bits to enable the irq. when the line voltage drops below the thres hold, line/wakeup event register bit 8 will go to 1, and consequently so will status register bit 14. the microcontroller will then detect the irq and will read the status register and the line/wakeup event register which will indicate the line drop - out e vent. as a guard against a false drop - out caused by noise, the microcontroller then could poll the adc comparator level (line/wakeup event register bit 9) to confirm that it is a reliable 0. alternatively, it could measure the voltage by using the follow ing successive approximation technique. ii. line voltage measurement using successive approximation by programming successive values of adc - ref and reading the comparator output (bit 9) from the line/wakeup event register, the voltage at adcin (and by ca lculation the line voltage) can be determined. the technique for successive approximation is:
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 25 d/878/2 set the msb (bit 7) of the adc - ref register to 1 and all other bits to 0. read the adc comparator level (bit 9 of the line/wakeup event register); if it is 1 then keep the msb at 1, otherwise set it to 0. repeat this procedure for the next most significant bit (bit 6) and continue until the lsb (bit 0). the final value represents the voltage at adcin, i.e. : measured level is: ( av dd / 2 ) x ( final value / 255 ) note that this configuration is intended to give an indication of the dc value of the line rather than a precise time - quantised value (which would require a sample - and - hold circuit to be added). capacitor c18 de - emphasises the effect of ac sign als.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 26 d/878/2 1.5.12 c - bus interface this block provides for the transfer of data and control or status information between the cmx878?s internal registers and the c over the c - bus serial bus. each transaction consist s of a single register address byte sent from the c which may be followed by a one or more data byte(s) sent from the c to be written into one of the cmx878?s write only registers, or a one or more byte(s) of data read out from one of the cmx878?s read o nly registers, as illustrated in figure 9. data sent from the c on the command data line is clocked into the cmx878 on the rising edge of the serial clock input. reply data sent from the cmx878 to the c is valid when the serial clock is high. the csn li ne must be held low during a data transfer and kept high between transfers. the c - bus interface is compatible with most common c serial interfaces and may also be easily implemented with general purpose c i/o pins controlled by a simple software routine. figure 15 gives detailed c - bus timing requirements. for all c - bus data transfers the regulated supply must be provided to av dd and dv dd , powering the c - bus circuitry and the microcontroller. the c - bus registers are split between those which have their contents maintained by the standby supply (sbyv dd ) and those which have their contents maintained by the regulated supply (dv dd ). in a line - powered application it is necessary to minimise the current drawn from the line when in the on - hook state. for thi s reason it is intended that power should be removed from the regulated supply when it is not required. this will de - power the microcontroller and the functions of the cmx878 which are not required in this mode, for example the crystal oscillator, the v bi as generator, the modem & tones processor block, the line dac and adc, and the associated registers. the standby supply operates independently of the regulator and this powers the functions which must remain present in the on - hook state. these functions are the line reversal / ring detectors and the wake input detector. it also powers the three ?standby supply registers? ? these are: the configuration register. this is used to: enable the standby event detectors; to enable/disable the regulated suppl y; and to define certain states. as an example, the microcontroller could program this register to enable detection of a line reversal and de - power the regulated supply. this will remove power from the microcontroller but will leave the line reversal de tector enabled on the standby supply. when a line reversal is later detected, power to the microcontroller will be restored and it will begin its program. the supplementary standby register. a general purpose write/read register which can be used to sto re any values that must survive a drop - out of the regulated supply. the line/wakeup event register. this is read from in order to determine which detector events have occurred and to check that the contents of the standby supply registers are valid. (it also indicates the output of the line dac, although this additionally requires the regulated supply to be present.) the cmx878 will automatically power up the microcontroller (via the regulated supply) when: i. the circuit is initially plugged into line power. the microcontroller should then read the line/wakeup event register and will determine that the standby supply registers have ?invalid? contents. it will then proceed with programming the cmx878 registers. ii. a line reversal, ring, or wake inpu t event has occurred (note that the reversal and ring detectors must have been previously enabled in the configuration register for them to operate). the microcontroller will read the line/wakeup event register, it will determine that the standby supply r egisters have ?valid? contents, and it will determine and act upon the event which has occurred.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 27 d/878/2 definitions of ?valid? and ?invalid?: these terms describe the data integrity of the standby supply registers. the cmx878 monitors the standby supply and wi ll set the ?valid? bit (bit 5) of the line/wakeup event register accordingly. 1 = ?valid?. 0 = ?invalid?. upon first application of line power (or after a line interruption severe enough to drop sbyv dd below its acceptable level) this bit will be set t o 0 to indicate ?invalid? register contents. when the microcontroller has read this bit as being ?invalid? it should ignore the value of all other bits read back. it should then proceed to program both the configuration register and the supplementary sta ndby register to the required values. the standby supply register contents are now ?valid? and bit 5 of the line/wakeup event register will be set to 1. the microcontroller must check the ?valid? status at the start of its program after it has powered u p. also if the microcontroller is able to detect certain fault conditions (e.g. with a brown - out detector or a watchdog timer) it should again check the ?valid? status. all other c - bus registers are concerned with the control of functions which operate f rom the regulated supply, usually with the line off - hook; for example operation of the modem & tones processor block. note that these registers will lose their contents whenever the regulated supply is de - powered. interrupts: the only register bit whi c h can directly cause an interrupt is bit 14 (irq) of the status register and thus all interrupts operate through this bit. when this bit and the irqnen bit (bit 6) of the general control register are both 1 then the irqn output pin will be pulled low (to vss). the following c - bus addresses and registers are used by the cmx878: register name type address from supply: standby [s] or regulated [r] general reset command address only, no data $01 r general control register 16 - bit write - only $e0 r transmit mode register 16 - bit write - only $e1 r receive mode register 16 - bit write - only $e2 r transmit data register 8 - bit write - only $e3 & $e4 r receive data register 8 - bit read - only $e5 r status register 16 - bit read - only $e6 r programming register 16 - bit wri te - only $e8 r line control register 8 - bit write - only $ec r dac control register 8 - bit write - only $ed r adc control register 8 - bit write - only $ee r configuration register write 16 - bit write $f0 s configuration register read 16 - bit read $f1 s
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 28 d/878/2 csn a) single byte from c serial clock command data address (01 hex = reset) = level not important note: the serial clock line may be high or low at the start and end of each transaction. see figure 15. hi-z reply data 7 6 5 4 3 2 1 0 b) one address and one data byte from c csn serial clock command data address hi-z data to cmx878 reply data 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 c) one address and 2 data bytes from c csn serial clock command data address hi-z first (msb) data byte to cmx878 second (lsb) data byte to cmx878 reply data 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 d) one address byte from c and one reply byte from cmx878 csn serial clock hi-z address data from cmx78 command data reply data 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 e) one address byte from c and 2 reply bytes from cmx878 csn serial clock hi-z address first (msb) byte from cmx878 second(lsb) byte from cmx878 command data reply data 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 figure 9 c - bus transactions
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 29 d/878/2 1.5.12.1 general reset command general reset command (no data) c - bus address $01 this command resets the device and clears all bi ts of the general control, transmit mode, receive mode, line control, dac mode and adc mode registers and bits 15 and 13 - 0 of the status register. it does not affect the standby supply registers. 1.5.12.2 configuration register configuration register: 16 - bit read & write c - bus addresses: write $f0 ; read $f1 this is a ?standby supply register?. bit 0 writing 1 enables detection of line reversal event bit 1 writing 1 enables detection of start of ring event bit 2 writing 1 enables detection of end of ring burst event bit 3 set this bit to 0 bit 4 regulated supply enable 1 powers the regulated supply. 0 de - powers up the regulated supply. note that this bit can get set to 1 by events othe r than a c - bus write ? see below. bits 5 - 15 general purpose bits 5 - 15 whenever a c - bus ?write? is made to this register, its contents will be deemed valid and line/wakeup event register bit 5 will be set to 1. any loss of the standby supply will invali date the contents of this register and it will need to be (re - ) programmed; read line/wakeup event register bit 5 to check if this is necessary. bits 0 - 2. depending on which type of line reversal or ring event is to be detected, set one of these bits to logic 1. if it is necessary to distinguish between a line reversal and a ring then set bit 0 to 1; the microcontroller will be alerted to the first rt pin edge and can then monitor any further activity by reading the rd and rt bits from the line/wakeup event register. bit 3. set this bit to 0. when one of the above detection events occurs, bit 4 will be set to 1 powering the regulated supply and the microcontroller; also the status register bit 14 will be set to 1. bit 4. when this bit is set to 0* the regulated supply will be de - powered and only the circuits powered by the standby supply will remain active (ring, line reversal detectors, wake input, standby supply registers). both the microcontroller and the c - bus will be deactivated and this stat e will remain until a wake event occurs. the contents of all non - standby registers will be lost. this bit should be set to 1 when the regulated supply is to remain in its powered state. this bit is also gets set to 1 by: an event ? any of line/wakeup ev ent register bits 0 - 3 going to 1 (as caused by a line reversal, ring or wake pin event), a power - on - reset ? the line/wakeup event register bit 5 goes to 0 (when the contents of the standby registers are not valid due to a previous loss of the standby suppl y). * note: because an event indicated by the line/wakeup event register can set this bit, the line/wakeup event register must always be read (clearing it) before de - powering the regulated supply with bit 4.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 30 d/878/2 bits 5 - 15 are general purpose register bits wh ich, being powered from the standby supply, will retain their values even when the regulated supply is absent. these bits can be set by the microcontroller to represent various operating states. consequently if the regulated supply is temporarily lost (e .g. a central office generated line break following an off - hook transition), when the regulated supply returns, the microcontroller can read back these values to re - establish the position in its program. 1.5.12.3 supplementary standby register supplementary standby register: 16 - bit read and write c - bus addresses: write $f2 ; read $f3 this is a ?standby supply register? and allows for data storage even when the regulated supply is removed. the bits can be used by the application for any purpose bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 a 16 - bit general purpose register ? set as required 1.5.12.4 line/wakeup event register line/wakeup event register: 16 - bit read - only c - bus address $f4 this is a ?standby supply register?. bit 0 1 when a line reversal event has occurred bit 1 1 when a start of ring event has occurred bit 2 1 when an end of ring burst event has occurred bit 3 1 when a wake pin event has occurred bit 4 reserved for future use. currently set to 0 bit 5 1 when the contents of the standby supply registers are valid. bit 6 rd. the equivalent logic level at the ring detector?s rd input bit 7 rt. the equivalent logic level at the ring detector?s rt input bit 8 1 when a line adc drop - out event has occurred bit 9 adc comparator level (0 = adcin pin < adc - ref, else 1) bits 10 - 15 reserved for future use. currently set to 000000 bit 0. a ?line reversal event? is caused by one rising edge on the rd pin. bit 1. a ?start of ring event? is caused by two falling edges on the rd pin within the period that the rt pin is low. bit 2. an ?end of ring burst event? is as per the ?start of ring event? but it does not occur until the rt pin goes back high. these above three events can only occur if they were previously enabled in the configuration register. bit 3. a ?wake pin event? is when the wake pin makes a 0 to 1 transition. when one of b its 0 - 3 goes to 1, bit 4 of the configuration register will be set to 1, powering up the regulated supply and the microcontroller; also status register bit 14 will be set to 1. bit 4. currently set to 0. bit 5. this bit determines the validity of the register bits which are powered from the standby supply. after reading this register, the microcontroller should consider the level of this bit first.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 31 d/878/2 upon any drop - out of the standby supply, this bit will be set to 0 to indicate that the contents of all other register bits in the standby supply registers cannot be relied upon and are hence termed not valid. whenever the device is in this not valid state, it will also set configuration register bit 4 to 1 in order to ensure that the regulated supply and microcontroller are powered up. whenever the microcontroller reads a not valid state, it should proceed to program the configuration register and the supplementary standby register. programming the configuration register will make its contents valid and line/wakeup event register bit 5 will be set to 1. bits 6 and 7. the equivalent logic levels on the ring detector pins rd and rt can be sampled via these bits. bit 8. a ?line adc drop - out event? occurs when the line adc voltage has fallen below the pr ogrammed adc - ref voltage. when bit 8 goes to 1, status register bit 14 will be set to 1 ? this will also give an interrupt if the relevant flag bits are set. the ?line adc drop - out event? is disabled when the adc control register is set to all 0?s. bit 9. the level on the output of the line adc comparator. bits 0 - 3 and bit 8 are cleared after reading this register. 1.5.12.5 line control register line control register : 8 - bit write - only. c - bus a ddress $ec this register controls sets various logic outputs which can be used to control external circuits. bit 0 logic level clid z en pin (caller line id z control) bit 1 logic level at gp op1 pin (a general purpose logic pin) bit 2 logic level at g p op2 pin (a general purpose logic pin) bit 3 logic level at gp op3 pin (a general purpose logic pin) bit 4 logic level at gyon (gyrator enable) bit 5 reserved for future use. set to 0. bit 6 reserved for future use. set to 0. bit 7 reserved for fut ure use. set to 0. 1.5.12.6 dac control register dac control register : 8 - bit write - only c - bus address $ed bit: 7 6 5 4 3 2 1 0 register value when the dac is enabled, the voltage produced is: av dd x ( register value / 255 ) via an output impedance of approximately 5k w . all bits of this register are cleared to 0 by a general reset command. a setting of all 0?s will disable and powersave the dac.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 32 d/878/2 the state of the ictrl pin is also depen dent on the mode of the regulator and gyrator as shown in the following table: mode of operation regulator enabled? gyrator enabled? dac enabled? ictrl output on - hook, min. current n n n vss on - hook, regulator on y n n low z vss off - hook y y n hi z pr ogrammed line current draw y n y as programmed on the dac 1.5.12.7 adc control register adc control register: 8 - bit write - only. c - bus address $ee bit: 7 6 5 4 3 2 1 0 register value the adc comprises an 8 bit programmable reference voltage, adc - ref, which is compared with the voltage at the adcin pin. the output of the comparator is available in the line/wake event register. the adc is designed to operate with signals between 0v (vss) and h alf supply (av dd / 2). the external divider will normally be configured to limit the adcin pin signals to within this range. the adc - ref voltage is: ( av dd / 2 ) x ( register value / 255 ) all bits of this register are cleared to 0 by a general reset co mmand. a setting of all 0s will powersave the adc circuit and will force the output of the comparator to 1. the adc can be used to measure a voltage or detect a drop - out. see section 1.5.11 for details.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 33 d/878/2 1.5.12.8 general control register general control register: 16 - bit write - only. c - bus address $e0 this register controls general features of the modem & tones processor block such as the powersave and loopback modes, and the irq mask bits. it al so allows the fixed compromise equalisers in the tx and rx signal paths to be disabled if desired, and sets the internal clock dividers to use either a 11.0592 or a 12.288 mhz xtal frequency. all bits of this register are cleared to 0 by a general reset c ommand. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 xtal freq lb equ 0 pwr rst irqn en irq mask bits general control register b15 - 13: reserved, set to 000 general control register b12: xtal frequency this bit should be set according to the xt al frequency. b12 = 1 11.0592mhz b12 = 0 12.2880mhz general control register b11: analogue loopback test mode this bit controls the analogue loopback test mode. note that in loopback test mode both transmit and receive mode registers should be set to the same modem type and band or bit rate. b11 = 1 local analogue loopback mode enabled b11 = 0 no loopback (normal modem operation) general control register b10: tx and rx fixed compromise equalisers this bit allows the tx and rx fixed compromis e equalisers in the modem transmit and receive filter blocks to be disabled. b10 = 1 disable equalisers b10 = 0 enable equalisers (600, 1200 or 2400bps modem modes) general control register b9: reserved, set to 0
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 34 d/878/2 general control register b8: p owerup this bit controls the internal power supply to most of the internal circuits, including the xtal oscillator, v bias supply and the modem & tones processor block. it does not affect the dac and adc. it does not affect the circuits which run off the standby supply. note that the general reset command clears this bit, putting the modem & tones processor block into powersave mode. when the device is switched from powersave mode to normal operation by setting the powerup bit to 1, the reset bit should also be set to 1 and should be held at 1 for about 20ms while the internal circuits, xtal oscillator and v bias stabilise before starting to use the transmitter or receiver. changing the powerup bit from 0 to 1 clears all bits of the transmit mode and rec eive mode registers and clears b15 and b13 - 0 of the status register. b8 = 1 modem & tones processor block powered up normally b8 = 0 modem & tones processor block powersave general control register b7: reset setting this bit to 1 resets the cmx878? s internal circuitry, clearing all bits of the transmit and receive mode registers and b13 - 0 of the status register. b7 = 1 internal circuitry in a reset condition. b7 = 0 normal operation general control register b6: irqnen (irqn o/p enable) setti ng this bit to 1 enables the irqn output pin. b6 = 1 irqn pin driven low (to v ss ) if the irq bit of the status register = 1 b6 = 0 irqn pin disabled (high impedance) general control register b5 - 0: irq mask bits these bits affect the operation of th e irq bit of the status register as described in section 1.5.12.13.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 35 d/878/2 1.5.12.9 transmit mode register transmit mode register: 16 - bit write - only. c - bus address $e1 this register controls the cmx878 transmit signal type and level. all bits of this register are cleared to 0 by a general reset command or when b7 (reset) of the general control register is 1. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 tx mode = modem tx level guard tone scrambler start - stop / synch data # data bits / synch data source tx mode = dtmf/tones tx level unused, set to 0000 dtmf or tone select tx mode = disabled set to 0000 0000 0000 tx mode register b15 - 12: tx mode these 4 bits select the transmit operating mode. b15 b14 b13 b12 1 1 1 1 v.22bis 2400 bps qam high band (answering modem) 1 1 1 0 ? low band (calling modem) 1 1 0 1 v.22/bell 212a 1200 bps dpsk high band (answering modem) 1 1 0 0 ? low band (calling modem) 1 0 1 1 v.22 600 bps dpsk high band (answering modem) 1 0 1 0 ? low band (calling modem) 1 0 0 1 v.21 300 bps fsk high band (answering modem) 1 0 0 0 ? low band (calling modem) 0 1 1 1 bell 103 300 bps fsk high band (answering modem) 0 1 1 0 ? low band (calling modem) 0 1 0 1 v. 23 fsk 1200 bps 0 1 0 0 ? 75 bps 0 0 1 1 bell 202 fsk 1200 bps 0 0 1 0 ? 150 bps 0 0 0 1 dtmf / tones 0 0 0 0 transmitter disabled tx mode register b11 - 9: tx level these 3 bits set the gain of the tx level control block. b11 b10 b9 1 1 1 0db 1 1 0 - 1.5db 1 0 1 - 3.0db 1 0 0 - 4.5db 0 1 1 - 6.0db 0 1 0 - 7.5db 0 0 1 - 9.0db 0 0 0 - 10.5db
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 36 d/878/2 tx mode register b8 - 7: tx guard tone (qam, dpsk modes) these 2 bits select the guard tone to be transmitted together with highba nd qam or dpsk. set both bits to 0 in fsk modes. b8 b7 1 1 tx 550hz guard tone 1 0 tx 1800hz guard tone 0 x no tx guard tone tx mode register b6 - 5: tx scrambler (qam, dpsk modes) these 2 bits control the operation of the tx scrambler used in qa m and dpsk modes. set both bits to 0 in fsk modes. b6 b5 1 1 scrambler enabled, 64 ones detect circuit enabled (normal use) 1 0 scrambler enabled, 64 ones detect circuit disabled 0 x scrambler disabled tx mode register b4 - 3: tx data format (qam , dpsk, fsk modes) these two bits select synchronous or start - stop mode and the addition of a parity bit to transmitted characters in start - stop mode. b4 b3 1 1 synchronous mode 1 0 start - stop mode, no parity 0 1 start - stop mode, even parity bit a dded to data bits 0 0 start - stop mode, odd parity bit added to data bits tx mode register b2 - 0: tx data and stop bits (qam, dpsk, fsk start - stop modes) in start - stop mode these three bits select the number of tx data and stop bits. b2 b1 b0 1 1 1 8 data bits, 2 stop bits 1 1 0 8 data bits, 1 stop bit 1 0 1 7 data bits, 2 stop bits 1 0 0 7 data bits, 1 stop bit 0 1 1 6 data bits, 2 stop bits 0 1 0 6 data bits, 1 stop bit 0 0 1 5 data bits, 2 stop bits 0 0 0 5 data bits, 1 stop bit tx mode register b2 - 0: tx data source (qam, dpsk, fsk synchronous mode) in synchronous mode (b4 - 3 = 11) these three bits select the source of the data fed to the tx fsk or qam/dpsk scrambler and modulator. b2 b1 b0 1 x x data bytes from tx data buffer 0 1 1 continuous 1s 0 1 0 continuous 0s 0 0 x continuous v.22bis handshake s1 pattern dibits ?00,11? in dpsk and qam modes, continuous alternating 1s and 0s in all other modes.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 37 d/878/2 tx mode register b8 - 0: dtmf/tones mode if dtmf/tones transmit mode has been selected (tx mode register b15 - 12 = 0001) then b8 - 5 should be set to 0000 and b4 - 0 will select a dtmf signal or a fixed tone or one of four programmed tones or tone pairs for transmission. b4 = 0: tx fixed tone or programmed tone pair b3 b2 b 1 b0 tone frequency (hz) 0 0 0 0 no tone 0 0 0 1 697 0 0 1 0 770 0 0 1 1 852 0 1 0 0 941 0 1 0 1 1209 0 1 1 0 1336 0 1 1 1 1477 1 0 0 0 1633 1 0 0 1 1300 (calling tone) 1 0 1 0 2100 (answer tone) 1 0 1 1 2225 (answer tone) 1 1 0 0 tone pair ta programmed tx tone or tone pair, see 1.5.12.14 1 1 0 1 tone pair tb ? 1 1 1 0 tone pair tc ? 1 1 1 1 tone pair td ? b4 = 1: tx dtmf b3 b2 b1 b0 low frequency (hz) high frequency (hz) keypad symbol 0 0 0 0 941 1633 d 0 0 0 1 697 1209 1 0 0 1 0 697 1336 2 0 0 1 1 697 1477 3 0 1 0 0 770 1209 4 0 1 0 1 770 1336 5 0 1 1 0 770 1477 6 0 1 1 1 852 1209 7 1 0 0 0 852 1336 8 1 0 0 1 852 1477 9 1 0 1 0 941 1336 0 1 0 1 1 941 1209 * 1 1 0 0 941 1477 # 1 1 0 1 697 1633 a 1 1 1 0 770 1633 b 1 1 1 1 852 1633 c
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 38 d/878/2 1.5.12.10 receive mode register receive mode register: 16 - bit write - only. c - bus address $e2 this register controls the cmx878 receive si gnal type and level. all bits of this register are cleared to 0 by a general reset command or when b7 (reset) of the general control register is 1. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 rx mode = modem rx level eq descrambl start - stop/synch no. of bits and parity rx mode = tones detect rx level dtmf/tones/call progress select rx mode = disabled set to 0000 0000 0000 rx mode register b15 - 12: rx mode these 4 bits select the receive operating mode. b15 b14 b13 b12 1 1 1 1 v.22bis 2400 b ps qam high band (calling modem) 1 1 1 0 ? low band (answering modem) 1 1 0 1 v.22/bell 212a 1200 bps dpsk high band (calling modem) 1 1 0 0 ? low band (answering modem) 1 0 1 1 v.22 600 bps dpsk high band (calling modem) 1 0 1 0 ? low band (answ ering modem) 1 0 0 1 v.21 300 bps fsk high band (calling modem) 1 0 0 0 ? low band (answering modem) 0 1 1 1 bell 103 300 bps fsk high band (calling modem) 0 1 1 0 ? low band (answering modem) 0 1 0 1 v.23 fsk 1200 bps 0 1 0 0 ? 75 bps 0 0 1 1 bell 202 fsk 1200 bps 0 0 1 0 ? 150 bps 0 0 0 1 dtmf, programmed tone pair, answer tone, call progress detect 0 0 0 0 receiver disabled rx mode register b11 - 9: rx level these three bits set the gain of the rx gain control block. b11 b10 b9 1 1 1 0db 1 1 0 - 1.5db 1 0 1 - 3.0db 1 0 0 - 4.5db 0 1 1 - 6.0db 0 1 0 - 7.5db 0 0 1 - 9.0db 0 0 0 - 10.5db
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 39 d/878/2 rx mode register b8: rx auto - equalise (dpsk/qam modem modes) this bit controls the operation of the receive dpsk/qam auto - e qualiser. set to 0 in fsk modes. set to 1 in 2400bps qam mode. b8 = 1 enable auto - equaliser b8 = 0 dpsk mode: auto - equaliser disabled qam mode : auto - equaliser settings frozen rx mode register b7 - 6: rx scrambler (dpsk/qam modem modes) these 2 bits control the operation of the rx descrambler used in qam and dpsk modes. set both bits to 0 in fsk modes b7 b6 1 1 descrambler enabled, 64 ones detect circuit enabled (normal use) 1 0 descrambler enabled, 64 ones detect circuit disabled 0 x descr ambler disabled rx mode register b5 - 3: rx usart setting (qam, dpsk, fsk modem modes) these three bits select the rx usart operating mode. the 1% and 2.3% overspeed options apply to dpsk/qam modes only. b5 b4 b3 1 1 1 rx synchronous mode 1 1 0 rx start - stop mode, no overspeed 1 0 1 rx start - stop mode, +1% overspeed (1 in 8 missing stop bits allowed) 1 0 0 rx start - stop mode, +2.3% overspeed (1 in 4 missing stop bits allowed) 0 x x rx usart function disabled rx mode register b2 - 0: rx data b its and parity (qam, dpsk, fsk start - stop modem modes) in start - stop mode these three bits select the number of data bits (plus any parity bit) in each received character. these bits are ignored in synchronous mode. b2 b1 b0 1 1 1 8 data bits + parity 1 1 0 8 data bits 1 0 1 7 data bits + parity 1 0 0 7 data bits 0 1 1 6 data bits + parity 0 1 0 6 data bits 0 0 1 5 data bits + parity 0 0 0 5 data bits rx mode register b2 - 0: tones detect mode in tones detect mode (rx mode register b15 - 12 = 0001) b8 - 3 should be set to 000000 bits 2 - 0 select the detector type. b2 b1 b0 1 0 0 programmable tone pair detect 0 1 1 call progress detect 0 1 0 2100, 2225hz answer tone detect 0 0 1 dtmf detect 0 0 0 disabled
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 40 d/878/2 1.5.12.11 tx data regis ter tx data register: 8 - bit write - only. c - bus addresses $e3 and $e4 bit: 7 6 5 4 3 2 1 0 data bits to be transmitted in synchronous tx data mode this register contains the next 8 data bits to be transmi tted. bit 0 is transmitted first. in tx start - stop mode the specified number of data bits will be transmitted from this register (b0 first). a start bit, a parity bit (if required) and stop bit(s) will be added automatically. this register should only be written to when the tx data ready bit of the status register is 1. c - bus address $e3 should normally be used, $e4 is for implementing the v.14 overspeed transmission requirement in start - stop mode, see section 1.5.1. 1.5.12.12 rx data register rx data register: 8 - bit read - only. c - bus address $e5 bit: 7 6 5 4 3 2 1 0 received data bits in unformatted rx data mode this register contains 8 received data bits, b0 of the register holding the earliest rece ived bit, b7 the latest. in rx start - stop data mode this register contains the specified number of data bits from a received character, b0 holding the first received bit.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 41 d/878/2 1.5.12.13 status register statu s register: 16 - bit read - only. c - bus address $e6 bits 13 - 0 of this register are cleared to 0 by a general reset command or when b7 (reset) of the general control register is 1. bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 irq rd pf see below for uses of t hese bits the meanings of the status register bits 12 - 0 depend on whether the receive circuitry is in modem or tones detect mode. status register bits: rx modem modes rx tones detect modes ** irq mask bit b15 irq b14 set to 1 when a line/wak eup event has occurred b5 b13 programming flag bit. see 1.5.12.14 b4 b12 set to 1 on tx data ready. cleared by write to tx data register b3 b11 set to 1 on tx data underflow. cleared by write to tx data register b3 b10 1 when energy is detected in rx modem signal band 1 when energy is detected in call progress band or when both programmable tones are detected b2 b9 1 when s1 pattern (double dpsk dibit 00,11) is detected in dpsk or qam modes, or when ?1010..? pattern is detected in fsk modes 0 b1 b8 see following table 0 b1 b7 see following table 1 when 2100hz answer tone or the second programmable tone is detected b1 b6 set to 1 on rx data ready. cleared by read from rx data register 1 when 2225hz answer tone or the first programmable tone i s detected b0 b5 set to 1 on rx data overflow. cleared by read from rx data register 1 when dtmf code is detected b0 b4 set to 1 on rx framing error 0 - b3 set to 1 on even rx parity rx dtmf code b3, see table - b2 qam/dpsk rx signal quality b2 rx dtmf code b2 - b1 qam/dpsk rx signal quality b1 rx dtmf code b1 - b0 qam/dpsk rx signal quality b0 or fsk frequency demodulator output rx dtmf code b0 -
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 42 d/878/2 notes: ** this column shows the corresponding irq mask bits in the general control register. a 0 to 1 transition on any of the status register bits 14 - 5 will cause the irq bit b15 to be set to 1 if the corresponding irq mask bit is 1. the irq bit is cleared by a read of the status register or a general reset command or by setting b7 or b8 of the general control register to 1. a spurious ?continuous 0s? detect may be generated within 4msec of changing the rx mode register to any of the qam or dpsk modes. the operation of the data demodulator and pattern detector circuits within the cmx878 does not depend on the state of the rx energy detect function. decoding of status register b8,7 in rx modem modes, see also figure 8a b8 b7 descrambler disabled descrambler enabled (dpsk/qam modes only) 1 1 - continuous scrambled 1s (see note) 1 0 cont inuous unscrambled 0s continuous scrambled 0s 0 1 continuous unscrambled 1s continuous unscrambled 1s 0 0 - - when the descrambler is enabled then detection of continuous unscrambled 1s will inhibit the continuous scrambled 1s detector. figure 10a operation of status register bits 5 - 10 the irqn output pin will be pulled low (to v ss ) when the irq bit of the status register and the irqnen bit (b6) of the general control register are both 1. changes to status register bits caused by a change o f tx or rx operating mode can take up to 150 m s to take effect. in powersave mode or when the reset bit (b7) of the general control register is 1 bit 15 of the status register continues to operate. the ?continuous 0? and ?continuous 1? detectors monitor t he rx signal after the qam/dpsk descrambler, (see figure 8a) and hence will detect continuous 1s or 0s if the descrambler is disabled, or continuous scrambled 1s or 0s if the descrambler is enabled.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 43 d/878/2 in qam or dpsk rx modem modes b2 - 0 of the status registe r contain a value indicative of the received signal ber, see figure 11. in rx fsk modem modes bits 2 and 1 will be zero and b0 will show the output of the frequency demodulator, updated at 8 times the nominal data rate. figure 10b operation of status register in dtmf rx mode b3 b2 b1 b0 low frequency (hz) high frequency (hz) keypad symbol 0 0 0 0 941 1633 d 0 0 0 1 697 1209 1 0 0 1 0 697 1336 2 0 0 1 1 697 1477 3 0 1 0 0 770 1209 4 0 1 0 1 770 1336 5 0 1 1 0 770 1477 6 0 1 1 1 852 1209 7 1 0 0 0 852 1336 8 1 0 0 1 852 1477 9 1 0 1 0 941 1336 0 1 0 1 1 941 1209 * 1 1 0 0 941 1477 # 1 1 0 1 697 1633 a 1 1 1 0 770 1633 b 1 1 1 1 852 1633 c received dtmf code: b3 - 0 of status register bit 14: this bit is the logical - or of line/wakeup e vent register bits 0,1,2,3 & 8. it will go to 1 to indicate that a line/wakeup event has occurred ? this could be a line reversal/ring event, a wake pin event, or a line adc drop - out event. the regulated supply and microcontroller will be powered - up (i f not already) by such an event.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 44 d/878/2 bit 14 going to 1 can also produce an irq if the appropriate mask bits have been set ? although this is only possible in the case where the regulated supply has not been de - powered since the setting of the mask bits. the microcontroller is therefore made aware of the line/wakeup event by being powered up or with an interrupt. following this powerup/irq, the microcontroller should read the status register to clear any interrupt. it should then read the line/wakeup event register to determine which line/wakeup event had occurred. 1.e-06 1.e-05 1.e-04 1.e-03 0 1 2 3 4 5 6 7 rx status register ber reading ber figure 11 typical rx ber vs. average status register ber reading (b2 - 0) 1.5.12.14 programming register programming register : 16 - bit write - only. c - bus address $e8 this register is used to program the transmit and receive programmed tone pairs by writing appropriate values to ram locations within the cmx878. note that these ram locations are cleared by powersave or reset. the programming re gister should only be written to when the programming flag bit (b13) of the status register is 1. the act of writing to the programming register clears the programming flag bit. when the programming action has been completed (normally within 150 m s) the cmx 878 will set the bit back to 1. when programming transmit or receive tone pairs, do not change the transmit or receive mode registers until programming is complete and the programming flag bit has returned to 1. transmit tone pair programming 4 transmit tone pairs (ta to td) can be programmed. the frequency (max 3.4khz) and level must be entered for each tone to be used. single tones are programmed by setting both level and frequency values to zero for one of the pair.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 45 d/878/2 programming is done by writing a sequence of up to seventeen 16 - bit words to the programming register. the first word should be 32768 (8000 hex), the following 16 - bit words set the frequencies and levels and are in the range 0 to 16383 (0 - 3fff hex) word tone pair value written 1 32 768 2 ta tone 1 frequency 3 ta tone 1 level 4 ta tone 2 frequency 5 ta tone 2 level 6 tb tone 1 frequency 7 tb tone 1 level - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16 td tone 2 frequency 17 td tone 2 level the frequency values to be entered are calculated from the formula: value to be entered = desired frequency (hz) * 3.414 i.e. for 1khz the value to be entered is 3414 (or 0d56 in hex). the level values to be entered are calculated from the formula: value to be entered = desired vrms * 93780 / v dd i.e. for 0.5vrms at vdd = 3.0v, the value to be entered is 15630 (3d0e in hex) note that allowance should be made for the transmit signal filtering in the cmx878 which attenuates the output signal for fre quencies above 2khz by 0.25db at 2.5khz, by 1db at 3khz and by 2.2db at 3.4khz. on powerup or after a reset, the tone pairs ta - tc are set to notone, and td set to generate 2130hz + 2750hz at approximately ? 20dbm each. receive tone pair programming the p rogrammable tone pair detector is implemented as shown in figure 12a. the filters are 4 th order iir sections. the frequency detectors measure the time taken for a programmable number of complete input signal cycles and compare this time against programmabl e upper and lower limits. figure 12a programmable tone detectors
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 46 d/878/2 figure 12b filter implementation programming is done by writing a sequence of twenty - seven 16 - bit words to the programming register. the first word should be 32769 (8001 hex), the f ollowing twenty - six 16 - bit words set the frequencies and levels and are in the range 0 to 32767 (0000 - 7fff hex). word value written word value written 1 32769 2 filter #1 coefficient b2 1 15 filter #2 coefficient b2 1 3 filter #1 coefficient b1 1 16 filter #2 coefficient b1 1 4 filter #1 coefficient b0 1 17 filter #2 coefficient b0 1 5 filter #1 coefficient a2 1 18 filter #2 coefficient a2 1 6 filter #1 coefficient a1 1 19 filter #2 coefficient a1 1 7 filter #1 coefficient b2 2 20 filter #2 coefficient b2 2 8 filter #1 coefficient b1 2 21 filter #2 coefficient b1 2 9 filter #1 coefficient b0 2 22 filter #2 coefficient b0 2 10 filter #1 coefficient a2 2 23 filter #2 coefficient a2 2 11 filter #1 coefficient a1 2 24 filter #2 coefficient a1 2 12 freq measurement #1 ncycles 25 freq measurement #2 ncycles 13 freq measurement #1 mintime 26 freq measurement #2 mintime 14 freq measurement #1 maxtime 27 freq measurement #2 maxtime the coefficients are entered as 15 - bit signed (two?s comp lement) integer values (the most significant bit of the 16 - bit word entered should be zero) calculated as 8192 * coefficient value from the user?s filter design program (i.e. this allows for filter design values of - 1.9999 to +1.9999). the design of the i ir filters should make allowance for the fixed receive signal filtering in the cmx878 which has a low pass characteristic above 1.5khz of 0.4db at 2khz, 1.2db at 2.5khz, 2.6db at 3khz and 4.1db at 3.4khz. ?ncycles? is the number of signal cycles for the f requency measurement. ?mintime? is the smallest acceptable time for ncycles of the input signal expressed as the number of 9.6khz timer clocks. i.e. ?mintime? = 9600 * ncycles / high frequency limit ?maxtime? is the highest acceptable time for ncycles o f the input signal expressed as the number of 9.6khz timer clocks. i.e. ?maxtime? = 9600 * ncycles / low frequency limit the level detectors include hysteresis. the threshold levels - measured on the line with unity gain filters, using the line interface circuit shown in figure 4a, and with the rx gain control block set to 0db - are nominally: ?off? to ?on? - 44.5dbm ?on? to ?off? - 47.0dbm
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 47 d/878/2 note that if any changes are made to the programmed values while the cmx878 is running in programmed tone detect m ode they will not take effect until the cmx878 is next switched into programmed tone detect mode. on a modem & tones processor block powerup or reset, the programmable tone pair detector is set to act as a simple 2130hz + 2750hz detector.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 48 d/878/2 1.6 applicat ion notes 1.6.1 controlling the phone line the cmx878 needs to control the phone line in various operating states. the main states are summarised in the followi ng table. mode of operation explanation on - hook, min. current this is the on - hook or standby state. the regulator is disabled and therefore also the microcontroller. only the standby circuits remain active. the device may have previously been primed f or detection of a ring or line reversal event. it will also respond to a wake pin event. on - hook, regulator on in this state the regulated supply is active but the gyrator / off - hook current draw is disabled. there will be a current drawn from the line by the regulator, providing a 3.3v for the cmx878, the microcontroller and any additional application. the current taken will not be sufficient to take the line off - hook. off - hook taking line current (dc mask) this is the off - hook state when the line is in - use. the regulator and gyrator are enabled. current will be drawn from the line to take the line off - hook. it will also present the correctly matched impedance to ac signals. the cmx878 can now be programmed to transmit and receive tones and modem s ignals. the line voltage can be monitored by the adc. programmed line current draw in this state the regulator is enabled and will draw a small line current (regulator + microcontroller + active cmx878 circuitry). an additional line current draw can be set by controlling the level of the dac. this feature can assist with characterising the line. whilst progressively increasing the line current, measure the line voltage with the adc and check for the presence of a dial tone with the call progress detect or. when dial tone is detected, store a representation of the line voltage in one of the standby supply registers. this knowledge of the line voltage at below which the line is off - hook can be used to determine if an extension has already seized the line . the next table shows which circuits will need to be enabled. mode of operation regulator enabled? gyrator enabled? dac enabled? adc enabled? on - hook, min. current n n n n on - hook, regulator on y n n y if want to measure line voltage off - hook on dc mask y y n y to detect an extension going off - hook programmed line current draw y n y y note that in order to use any of the modem & tones processor functions of the cmx878, bit 7 of the general control register ?pwr? must also be set to 1 (otherwise th e modem & tones processor will be powersaved).
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 49 d/878/2 1.6.2 microcontroller boot - up routines the microcontroller will normally be powered from the regulated supply. there are two main cases of when p ower will be applied to the microcontroller causing it to jump to the start point in its program: i. when the application is first plugged into line power. ii. when the sleeping cmx878 is woken by the detection of a ring, line reversal or the wake input g oing high. both of these events will power up the regulated supply and the microcontroller must deal with both cases. the following is an example of a suitable routine: (microcontroller powers up, program starts) 1. read cmx878 status register to clear any irq 2. read line/wakeup event register 3. if line/wakeup event register bit 5 is 0, a loss of standby supply had occurred making the contents of the standby supply registers invalid; begin programming cmx878 registers from scratch, starting with the c onfiguration register. 4. otherwise, consider the remaining line/wakeup event bits to check for a line reversal/ring/wake input event ? proceed accordingly. 5. otherwise, read back the configuration register. general purpose bits 5 - 15 * may hold a value r epresenting a state which existed before the regulated supply failed then returned (e.g. the line was in an off - hook state, when the central office generated a temporary line break). if this is the case, proceed accordingly ? perhaps returning to the prev ious state. to take the line off - hook: 6. define the state of the system by writing a code to the general purpose * bits of the configuration register (these bits will survive a drop - out of the regulated supply). 7. take the line off - hook by setting hig h the gyrator output bit in the line control register. 8. the program can now proceed to power - up the modem & tones processor and associated circuits, starting with the programming of the general control register. * note that the supplementary standby reg ister can also be used to store a code. in common with many embedded systems, it is recommended that precautions are taken to minimise the potential of the program crashing due to a software bug or a power supply disturbance. watchdog timers and brown - ou t detectors can be employed to assist with this. it is recommended that following such a disturbance, a general reset is issued to the cmx878 before proceeding to re - program it. 1.6.3 v.22bis calling modem application this section describes how the cmx878 can be used in a v.22bis calling modem application, employing v.25 automatic answering and the v.22bis recommended handshake sequence. this attempts to establish a 2400bps connection but ma y fall back to 1200bps if the answering modem is not capable of 2400bps operation. 1. ensure that the cmx878 is fully powered up. set the tx mode register to dtmf/tones mode (set to ?no tone? at this time), and the rx mode register to call progress detect mo de. 2. connect the line (go off hook) then dial the required number using the dtmf generator, monitoring for call progress signals (dial tone, busy, etc). change to answer tone detect mode.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 50 d/878/2 3. on detection of the 2100hz answer tone wait for it to end then wa it for the 2225hz answer tone detector to respond. (the ?2225hz? answer tone detector will recognise unscrambled binary 1s at 1200bps high band as well as 2225hz). when unscrambled binary 1s or 2225hz have been received for 155ms set a 456ms timer. 4. when the 456ms timer expires check that the 2225hz or unscrambled 1s is still being received, then set the tx mode register for v.22 1200bps low band transmission of s1 signal and set a 100ms timer. also set the rx mode register to v.22 1200bps high band rece ive, descrambler enabled and rx usart disabled. 5. when the 100ms timer expires set the tx mode register for v.22 1200bps low band transmission of scrambled 1s (continuous 1s with the scrambler enabled) and look for received s1 signal. 6. if the s1 signal is n ot detected within 270ms then go to step 14 as the answering modem is not capable of 2400bps operation. 7. if s1 signal is detected wait for it to end then set a 450ms timer. 8. when the 450ms timer expires set the rx mode register to v.22bis 2400bps high ba nd (this will begin 16 - way decisions) with the auto - equaliser and descrambler enabled. start to monitor for rx scrambled 1s. set a 150ms timer. 9. once 32 consecutive bits of received scrambled 1s at 2400bps have been detected, enable the rx usart. 10. when the 150ms timer expires set the tx mode register for v.22bis 2400bps scrambled 1s, set a 200ms timer. 11. load the tx data register with the first data to be transmitted. 12. when the 200ms timer expires set the tx mode register for start - stop or synchronous transm ission of data from the tx data buffer. this will start transmission of the data loaded in step 11. 13. a 2400bps data connection has now been established. 14. if the s1 signal had not been detected within 270ms after step 5 then monitor for scrambled 1s at 1200 bps. 15. when scrambled 1s (at 1200bps) have been received for 270ms enable the rx usart, set a 765ms timer and load the tx data register with the first data to be transmitted. 16. when the timer expires set the tx mode register for start - stop or synchronous tra nsmission of data from the tx data buffer. this will start transmission of the data loaded in step 15. 17. a 1200bps data connection has now been established. 1.6.4 v.22bis answering modem application this section describes how the cmx878 can be used in a v.22bis answering modem application, employing v.25 automatic answering and the v.22bis recommended handshake sequence. a 1200 or 2400 bps connection will be established depending on the sign als received from the calling modem.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 51 d/878/2 1. it is assumed that the cmx878 has powered up the regulator after detecting a ringing signal. the microcontroller confirms this by reading the line/wakeup event register. it then powers up the xtal and modem & tones processor circuits. 2. connect the line (go off hook), set a 2150ms timer and power up the cmx878, setting the tx mode register to dtmf/tones mode (set for ?no tone? at this time) and the rx mode register to v.22 1200bps low band receive, descrambler enabled , rx usart disabled. 3. when the 2150ms timer expires set the tx mode register to transmit the 2100hz answer tone and set a 3300ms timer. 4. when the 3300ms timer expires set the tx mode register to no tone and set a 75ms timer. 5. when the 75ms timer expires se t the tx mode register for v.22 high band 1200bps transmission of unscrambled 1s. monitor the received signal for the s1 signal or scrambled 1s. 6. if scrambled 1s are detected for 270ms go to step 15. 7. if the s1 signal is received wait for it to end then se t the tx mode register for v.22 high band 1200bps transmission of the s1 signal and set a 100ms timer. 8. when the 100ms timer expires set the tx mode register for v.22 high band 1200bps transmission of scrambled 1s and set a 350ms timer. 9. when the 350ms tim er expires set the rx mode register for v.22bis low band 2400bps receive (this will begin 16 - way decisions) with the auto - equaliser and descrambler enabled and the rx usart disabled, set a 150ms timer and start to monitor for rx scrambled 1s. 10. when the 150 ms timer expires set the tx mode register for v.22bis high band 2400bps transmission of scrambled 1s and set a 200ms timer. 11. load the tx data buffer with the first data to be transmitted. 12. once 32 consecutive bits of received scrambled 1s at 2400bps have b een detected, enable the rx usart. 13. when the 200ms timer expires set the tx mode register for start - stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 11. 14. a 2400bps data connection has now been established. 15. if scrambled 1s had been detected for 270ms in step 6, set the tx mode register to v.22 high band 1200bps scrambled 1s transmission and set a 765ms timer and enable the rx usart. 16. load the tx data buffer with the first data to be tr ansmitted. 17. when the 765ms timer expires set the tx mode register for start - stop or synchronous transmission of data from the tx data buffer. this will start transmission of the data loaded in step 16. 18. a 1200bps data connection has now been established.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 52 d/878/2 1.7 performance specification 1.7.1 electrical performance 1.7.1.1 absolute maximum ratings excee ding these maximum ratings can result in damage to the device. notes min. max. units supply (av dd - av ss ) or (dv dd - dv ss ) i - 0.3 7.0 v voltage on any pin to ground i, ii - 0.3 av dd + 0.3 v voltage on wake, rd, rt, vfb and regenab pins to ground i, iii - 0.3 sbyv dd + 0.3 v current into or out of v dd and v ss pins - 50 +50 ma current into or out of any other pin - 20 +20 ma notes: i. the negative supply rails av ss and dv ss (?ground?) are electrically connected on - chip and therefore mu st not have different potentials applied to them. they should also be connected together externally, having regard to the recommended grounding techniques described in section 1.4. av dd ? dv dd . ii. excludes pins which are connected to the standby supp ly (i.e. sbyv dd , wake, rd, rt, vfb and regenab). iii. it is possible that during the peaks of large ringing signals, the voltage at the rd pin could exceed sbyv dd + 0.3v. this is acceptable because on - chip diode clamps will limit the voltage to appr oximately sbyv dd + 0.7v and high value resistors should be employed in the external circuit to limit the current. min. max. units total allowable power dissipation at tamb = 25c d1 package 800 mw d6 package 550 mw e1 package 400 mw ... derating d1 package 13 mw/c d6 package 9 mw/c e1 package 5.3 mw/c storage temperature - 55 +125 c operating temperature - 40 +85 c 1.7.1.2 operating limits correct operation of the device outside these limits is not implied. notes min. max. units supply (av dd - v ss ) or (dv dd - dv ss ) iv 2.7 5.5 v operating temperature - 40 +85 c notes: iv. the circuit shown in figure 4a will give a regulated supply of nominally 3.3v which is within the specified range.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 53 d/878/2 1.7.1.3 operating characteristics for the following conditions unless otherwise specified: a v dd = 3.3v. circuit as in figure 4a. line voltage = 50v dc. cmx878 operational temp. range = - 40 to +85c. xtal frequency = 11.0592 or 12.288mhz 0.01% (100ppm). 0dbm corresponds to 775mvrms. dc parameters notes min. typ. max. u nits regulated supply at av dd (regulator on) 1a 3.1 3.3 3.5 v standby supply at sbyv dd (regulator off) 1a, 1b 2.9 3.4 3.9 v on - hook supply current from line (regulator off) 1a - 6.7 10 m a regulated supply current from li ne (regulator on, all other functions powersaved, no other load) 1a - 1.0 1.4 ma currents into the device via i dd = av dd + dv dd currents with regulator running at 3.3v : i dd (modem powersaved, i.e. ?pwr? bit =0) 1c, 2 - 100 130 m a i dd (modem reset but not powersaved) 1c, 3 - 2.0 3.0 ma i dd (modem running) 1c - 3.5 5.5 ma i dd (dac and adc only running) 1c - 1.0 2.0 ma logic '1' input level 4 70% - - dv dd logic '0' input level 4 - - 30 % dv dd logic input leakage current (vin = 0 to v dd ), (excluding xtal/clock input) - 1.0 - +1.0 m a output logic '1' level (l oh = 2 ma) 80% - - dv dd output logic '0' level (l ol = - 3 ma) - - 0.4 v irqn o/p 'off' state current (vout = v dd ) - - 1.0 m a rd and rt pin schmitt trigger input high - going threshold (vthi) (see figure 13) 0.56 x sbyv dd - 0.56 x sbyv dd + 0.6v v rd and rt pin schmitt trigger input low - going threshold (vtlo) (see figure 13) 0.44 x sbyv dd - 0.6v - 0.44 x sbyv dd v notes: 1a. with the application circuit at tamb = 0 to 40c. 1b. with the regulator on and the gyrator on (line off - hook) the minimum value for sbyv dd will be av dd ? d6 diode drop. 1c. at 25 c, not including any current drawn from the cmx878 pins by external circuitry other than x1, c1 and c2. ?modem? means the modem & tones processor block. 2. all logic inputs at v ss except for rt and csn inputs which are at v dd . 3. genera l mode register b8 and b7 both set to 1. 4. excluding rd, rt and wake pins.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 54 d/878/2 0 0.5 1 1.5 2 2.5 3 3.5 2.5 3 3.5 4 4.5 5 5.5 vdd vin vthi vtlo figure 13 typical schmitt trigger input voltage thresholds vs. sbyv dd xtal/clock input (timings for an external clock input) notes min. typ. max. units 'high' pulse width 30 - - ns 'low' pulse width 30 - - ns transmit qam and dpsk modes (v.22, bell 212a, v.22bis) notes min. typ. max. units carrier frequency, high band 5 - 2400 - hz carrier frequency, low band 5 - 1200 - hz baud rate 6 - 600 - baud bit rate (v.22, bell 212a) 6 - 1200/600 - bps bit rate (v.22bis) 6 - 2400 - bps 550hz guard tone frequency 548 550 552 hz 550hz guard tone level wrt data signal - 4.0 - 3.0 - 2.0 db 1800hz guard tone frequency 1797 1800 1803 hz 1800hz guard tone level wrt data signal - 7.0 - 6.0 - 5.0 db transmit v.21 fsk mode notes min. typ. max. units baud rate 6 - 300 - baud mark (logical 1) frequency, high band 1647 1650 1653 hz space (logical 0) frequency, high band 1847 1850 1853 hz mar k (logical 1) frequency, low band 978 980 982 hz space (logical 0) frequency, low band 1178 1180 1182 hz transmit bell 103 fsk mode notes min. typ. max. units baud rate 6 - 300 - baud mark (logical 1) frequency, high band 2222 2225 2228 hz space (logical 0) frequency, high band 2022 2025 2028 hz mark (logical 1) frequency, low band 1268 1270 1272 hz space (logical 0) frequency, low band 1068 1070 1072 hz transmit v.23 fsk mode notes min. typ. max. units baud rate 6 - 1200/75 - baud mark (logical 1) frequency, 1200 baud 1298 1300 1302 hz space (logical 0) frequency, 1200 baud 2097 2100 2103 hz mark (logical 1) frequency, 75 baud 389 390 391 hz space (logical 0) frequency, 75 baud 449 450 451 hz
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 55 d/878/2 transmit bell 2 02 fsk mode notes min. typ. max. units baud rate 6 - 1200/150 - baud mark (logical 1) frequency, 1200 baud 1198 1200 1202 hz space (logical 0) frequency, 1200 baud 2197 2200 2203 hz mark (logical 1) frequency, 150 baud 386 387 388 hz spac e (logical 0) frequency, 150 baud 486 487 488 hz dtmf/single tone transmit notes min. typ. max. units tone frequency accuracy - 0.2 - +0.2 % distortion 7 - 1.0 2.0 % transmit output level notes min. typ. max. units modem and single tone modes 7 - 11.0 - 10.0 - 9.0 dbm dtmf mode, low group tones 7 - 9.0 - 8.0 - 7.0 dbm dtmf: level of high group tones wrt low group 7 +1.0 +2.0 +3.0 db tx output buffer gain control accuracy 7 - 0.25 - +0.25 db notes: 5. % carrier frequency accuracy is the sam e as xtal/clock % frequency accuracy. 6 tx signal % baud or bit rate accuracy is the same as xtal/clock % frequency accuracy. 7. measured on a matched line with tx level control gain set to 0db, at a v dd = 3.3v (levels are proportional to v dd ). level m easurements for all modem modes are performed with random transmitted data and without any guard tone. 0dbm = 775mvrms. -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 100000 hz dbm bell 202 figure 14 maximum out of band tx line energy limits (see note 8) notes: 8. measured on the line with the tx line signal level set t o - 10dbm for qam, dpsk, fsk or single tones, - 6dbm and - 8dbm for dtmf tones. excludes any distortion due to external components.
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 56 d/878/2 receive qam and dpsk modes (v.22, bell 212a, v.22bis) notes min. typ. max. units carrier frequency (high band) 2392 240 0 2408 hz carrier frequency (low band) 1192 1200 1208 hz baud rate 9 - 600 - baud bit rate (v.22, bell 212a) 9 - 1200/600 - bps bit rate (v.22bis) 9 - 2400 - bps notes: 9. these are the bit and baud rates of the line signal, the acceptable t olerance is 0.01%. receive v.21 fsk mode notes min. typ. max. units acceptable baud rate 297 300 303 baud mark (logical 1) frequency, high band 1638 1650 1662 hz space (logical 0) frequency, high band 1838 1850 1862 hz mark (logical 1) fre quency, low band 968 980 992 hz space (logical 0) frequency, low band 1168 1180 1192 hz receive bell 103 fsk mode notes min. typ. max. units acceptable baud rate 297 300 303 baud mark (logical 1) frequency, high band 2213 2225 2237 hz spa ce (logical 0) frequency, high band 2013 2025 2037 hz mark (logical 1) frequency, low band 1258 1270 1282 hz space (logical 0) frequency, low band 1058 1070 1082 hz receive v.23 fsk mode notes min. typ. max. units 1200 baud acceptab le baud rate 1188 1200 1212 baud mark (logical 1) frequency 1280 1300 1320 hz space (logical 0) frequency 2080 2100 2120 hz 75 baud acceptable baud rate 74 75 76 baud mark (logical 1) frequency 382 390 398 hz space ( logical 0) frequency 442 450 458 hz receive bell 202 fsk mode notes min. typ. max. units 1200 baud acceptable baud rate 1188 1200 1212 baud mark (logical 1) frequency 1180 1200 1220 hz space (logical 0) frequency 2180 2200 222 0 hz 150 baud acceptable baud rate 148 150 152 baud mark (logical 1) frequency 377 387 397 hz space (logical 0) frequency 477 487 497 hz rx modem signal (fsk, dpsk and qam modes) notes min. typ. max. units signal level 10 - 45 - - 9 dbm signal to noise ratio (noise flat 300 - 3400hz) 20 - - db
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 57 d/878/2 rx modem s1 pattern detector (dpsk and qam modes) notes min. typ. max. units will detect s1 pattern lasting for 90.0 - - ms will not detect s1 pattern lasting for 72.0 hold time (minimum detector ?on? time) 5.0 - - ms rx modem energy detector notes min. typ. max. units detect threshold (?off? to ?on) 10,11 - - - 43.0 dbm undetect threshold (?on? to ?off?) 10,11 - 48.0 - - dbm hysteresis 10,11 2.0 - - db dete ct (? off? to ?on?) response time qam and dpsk modes 10,11 10.0 - 35.0 ms 300 and 1200 baud fsk modes 10,11 8.0 - 30.0 ms 150 and 75 baud fsk modes 10,11 16.0 - 60.0 ms undetect (? on? to ?off?) response time qam and dpsk m odes 10,11 10.0 - 55.0 ms 300 and 1200 baud fsk modes 10,11 10.0 - 40.0 ms 150 and 75 baud fsk modes 10,11 20.0 - 80.0 ms rx answer tone detectors notes min. typ. max. units detect threshold (?off? to ?on) 10,12 - - - 43.0 dbm undetect thr eshold (?on? to ?off?) 10,12 - 48.0 - - dbm detect (?off? to ?on?) response time 10,12 30.0 33.0 45.0 ms undetect (?on? to ?off?) response time 10,12 7.0 18.0 25.0 ms 2100hz detector ?will detect? frequency 2050 - 2160 hz ?will no t detect? frequency - - 2000 hz 2225hz detector ?will detect? frequency 2160 - 2285 hz ?will not detect? frequency 2335 - - hz rx call progress energy detector notes min. typ. max. units bandwidth ( - 3db points) see figure 7a 275 - 665 hz detect threshold (?off? to ?on) 10,13 - - - 37.0 dbm undetect threshold (?on? to ?off?) 10,13 - 42.0 - - dbm detect (?off? to ?on?) response time 10,13 30.0 36.0 45.0 ms undetect (?on? to ?off?) response time 10,13 6.0 8.0 50.0 ms n otes: 10. gain control block set to 0db 11. thresholds and times measured with random data for qam and dpsk modes, continuous binary ?1? for all fsk modes. fixed compromise line equaliser enabled. signal switched between off and - 33dbm 12. ?typical? val ue refers to 2100hz or 2225hz signal switched between off and - 33dbm. times measured wrt. received line signal 13. ?typical? values refers to 400hz signal switched between off and - 33dbm
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 58 d/878/2 dtmf decoder notes min. typ. max. unit valid input signal leve ls (each tone of composite signal) 10 - 30.0 - 0.0 dbm not decode level (either tone of composite signal) 10 - - - 36.0 dbm twist = high tone/low tone - 10.0 - 6.0 db frequency detect bandwidth 1.8 - - % frequency not detect bandwidth - - 3.5 % max level of low frequency noise (i.e. dial tone) interfering signal frequency <= 550hz 14 - - 0.0 db interfering signal frequency <= 450hz 14 - - 10.0 db interfering signal frequency <= 200hz 14 - - 20.0 db max. noise level wrt . signal 14,15 - - - 10.0 db dtmf detect response time - - 40.0 ms dtmf de - response time - - 30.0 ms status register b5 high time 14.0 - - ms ?will detect? dtmf signal duration 40.0 - - ms ?will not detect? dtmf signal duration - 25.0 - ms pause length detected 30.0 - - ms pause length ignored - - 15.0 ms notes: 14. referenced to dtmf tone of lower amplitude. 15 flat gaussian noise in 300 - 3400hz band. receive input amplifier notes min. typ. max. units input impedance (at 100hz) 10.0 moh m open loop gain (at 100hz) 10000 v/v rx gain control block accuracy - 0.25 +0.25 db
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 59 d/878/2 c - bus timings (see figure 15) notes min. typ. max. units t cse csn - enable to clock - high time 100 - - ns t csh last clock - high to csn - high time 100 - - ns t loz clock - low to reply output enable time 0.0 - - ns t hiz csn - high to reply output 3 - state time - - 1.0 s t csoff csn - high time between transactions 1.0 - - s t nxt inter - byte time 200 - - ns t ck clock - cycle time 200 - - ns t ch serial clock - high time 100 - - ns t cl serial clock - low time 100 - - ns t cds command data set - up time 75.0 - - ns t cdh command data hold time 25.0 - - ns t rds reply data set - up time 50.0 - - ns t rdh reply data hold ti me 0.0 - - ns maximum 30pf load on each c - bus interface line. note: these timings are for the latest version of the c - bus as embodied in the cmx878, and allow faster transfers than the original c - bus timings given in cml publication d/800/sys/3 july 19 94. figure 15 c - bus timing
line powered modem plus daa cmx878 ? 2002 consumer microcircuits limited 60 d/878/2 1.7.2 packaging figure 16 28 - pin soic (d1) mechanical outline: order as part no. cmx878d1 figure 17 28 - pin ssop (d6) mechanical outline: order as part no. CMX878D6
line powered modem plus daa cmx878 handling precautions: this product includes input protection, however, precautions should be taken to prevent device damage from electro - static discharge. cml does not assume any responsibility for the use of any circuitry described. no ipr or circuit patent licences are implied. cml reserves the right at any time without notice to change the said circuitry and this product specification. cml has a policy of testing every product shipped using ca librated test equipment to ensure compliance with this product specification. specific testing of all circuit parameters is not necessarily performed. www.cmlmicro.com oval park - langford - maldon - essex - cm9 6wg - england. tel: +44 (0)1621 875500 fax: +44 (0)1621 875600 sales: sales@cmlmicro.com technical support: techsupport@cmlmicro.com 4800 bethania station road - winston - salem - nc 27105 - usa. tel: +1 336 744 5050, 800 638 5577 fax: +1 336 744 5054 sales: us.sales@cml micro.com technical support: us.techsupport@cmlmicro.com no 2 kallang pudding road - #09 to 05/06 mactech industrial building - singapore 349307 tel: +65 6745 0426 fax: +65 6745 2917 sales: sg.sales@cmlmicro.com technical support: sg.techsupport@cmlmi cro.com figure 18 28 - pin tssop (e1) mechanical outline: order as part no. cmx878e1

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